Priority is claimed to Japanese Patent Application Number JP2004-48259 filed on Feb. 24, 2004, the disclosure of which is incorporated herein by reference in its entirety.
1. Field of the Invention
The present invention relates to a circuit device and a method of manufacturing the same. In particular, the present invention relates to a circuit device which has conductive patterns having different thicknesses, and a method of manufacturing the same.
2. Description of the Related Art
Referring to FIGS. 10A and 10B, a constitution of a conventional hybrid integrated circuit device will be described (for example, refer to Japanese Patent Application Official Gazette No. Hei 6 (1994)-177295 (page 4, FIG. 1)). FIG. 10A is a perspective view of a hybrid integrated circuit device 100, and FIG. 10B is a cross-sectional view taken along a line x-x′ of FIG. 10A.
The conventional hybrid integrated circuit device 100 has the following constitution. The hybrid integrated circuit device 100 is constituted of a rectangular substrate 106, an insulating layer 107 provided on a surface of the substrate 106, conductive patterns 108 formed on the insulating layer 107, circuit elements 104 fixed on the conductive patterns 108, thin metal wires 105 for electrically connecting the circuit elements 104 and the conductive patterns 108, and leads 101 electrically connected to the conductive patterns 108. The entire hybrid integrated circuit device 100 is sealed with a sealing resin 102. Methods of sealing the entire hybrid integrated circuit device 100 with the sealing resin 102 include injection molding using thermoplastic resin and transfer molding using thermosetting resin.
However, in the hybrid integrated circuit device as described above, film thicknesses of the conductive patterns differ between a hybrid integrated circuit substrate (hereinafter referred to as a substrate) on which a power element for a large current is mounted and a substrate on which a small-signal element is mounted. For example, in the substrate on which the power element is mounted, the thickness of the conductive pattern is, for example, 100 μm. Meanwhile, in the substrate on which the small-signal element is mounted, the thickness of the conductive pattern is 35 μm. Accordingly, there has been a problem that a cost is increased by preparing substrates having different thicknesses depending on elements to be mounted.
Moreover, in a substrate including a thick conductive pattern having a thickness of approximately 100 μm, there has been another problem that an LSI (large scale integration) circuit having a large number of terminals cannot be mounted on a mounting board because a fine pattern cannot be formed by use of the thick conductive pattern. Furthermore, there has been another problem that when a power element is mounted on a substrate including a thin conductive pattern having a thickness of approximately 35 μm, a sufficient current-carrying capacitance cannot be ensured since the thin conductive pattern has a small cross-sectional area.
The present invention has been made in view of the above-described problems. A main object of the present invention is to provide a circuit device in which a fine pattern can be formed while a current-carrying capacitance is ensured, and a method of manufacturing the same.